# packages

pkgId: 435ffbdae1e328bb56ae2aaa1d20683e648c68d434959e4e5cbc7dc7bb972711
name: alliance
arch: x86_64
version: 5.0
epoch: 0
release: 111.3
summary: VLSI EDA System
url: http://coriolis.lip6.fr/
rpm_license: GPL-2.0-only
rpm_vendor: obs://build.opensuse.org/home:jpc-lip6
rpm_group: Applications/Engineering
rpm_buildhost: reproducible
rpm_sourcerpm: alliance-5.0-111.3.src.rpm
location_href: x86_64/alliance-5.0-111.3.x86_64.rpm
checksum_type: sha256
description:
  Alliance is a complete set of free CAD tools and portable libraries for
  VLSI design. It includes a VHDL compiler and simulator, logic synthesis
  tools, and automatic place and route tools.

  A complete set of portable CMOS libraries is provided, including a RAM
  generator, a ROM generator and a data-path compiler.

  Alliance is the result of more than ten years effort spent at ASIM department
  of LIP6 laboratory of the Pierre et Marie Curie University (Paris VI, France).

  Alliance has been used for research projects such as the 875 000 transistors
  StaCS superscalar microprocessor and 400 000 transistors IEEE Gigabit HSL
  Router.

  You are kindly requested to mention
  " Designed with alliance (c) LIP6, Sorbonne Université"
  so as to spread the word about "alliance CAD system" and its development team.

  Alliance provides CAD tools covering most of all the digital design flow:

   * VHDL Compilation and Simulation
   * Model checking and formal proof
   * RTL and Logic synthesis
   * Data-Path compilation
   * Macro-cells generation
   * Place and route
   * Layout edition
   * Netlist extraction and verification
   * Design rules checking


pkgId: a70e136affb5254057f45628022f66eefcc4f82269ee31eaaeda046765c886b5
name: blt
arch: x86_64
version: 2.4
epoch: 0
release: 83.1
summary: Widget extension to the Tcl/Tk scripting language
url: http://sourceforge.net/projects/blt/
rpm_license: MIT
rpm_vendor: obs://build.opensuse.org/home:jpc-lip6
rpm_group: Unspecified
rpm_buildhost: reproducible
rpm_sourcerpm: blt-2.4-83.1.src.rpm
location_href: x86_64/blt-2.4-83.1.x86_64.rpm
checksum_type: sha256
description:
  BLT is a very powerful extension to Tk. It adds plotting widgets
  (graph, barchart and stripchart), hierarchy tree and table, tab
  notebook, table geometry manager, vector, background program
  execution, busy utility, eps canvas item, drag and drop facility,
  bitmap command and miscellaneous commands.
  Note: this version is stubs enabled and therefore should be compatible
  with Tcl/Tk versions after and including 8.3.1.


pkgId: 2156f689f52df4cb0c22a446018f12dc5eb5e68ea60785c037ddd39ab13da75b
name: blt-devel
arch: x86_64
version: 2.4
epoch: 0
release: 83.1
summary: Development files for BLT
url: http://sourceforge.net/projects/blt/
rpm_license: MIT
rpm_vendor: obs://build.opensuse.org/home:jpc-lip6
rpm_group: Unspecified
rpm_buildhost: reproducible
rpm_sourcerpm: blt-2.4-83.1.src.rpm
location_href: x86_64/blt-devel-2.4-83.1.x86_64.rpm
checksum_type: sha256
description:
  BLT is an extension to the Tk toolkit. BLT's most useful feature is the
  provision of more widgets for Tk, but it also provides more geometry managers
  and miscellaneous other commands. Note that you won't need to any patching
  of the Tcl or Tk source file to use BLT, but you will need to have Tcl/Tk
  installed in order to use BLT.

  This package provides headers needed to build packages based on BLT.


pkgId: 5c92f2f521cc0cf3915b4201a21ff222650594708a087b40d98da064466bf81f
name: coriolis-eda
arch: x86_64
version: 2.5.5
epoch: 0
release: 193.1.f4c1b74de
summary: Coriolis 2 EDA toolchain
url: https://coriolis.lip6.fr/
rpm_license: BSD-1-Clause AND LGPL-2.0-only AND GPL-2.0-only AND Apache-1.0
rpm_vendor: obs://build.opensuse.org/home:jpc-lip6
rpm_group: Applications/Engineering
rpm_buildhost: reproducible
rpm_sourcerpm: coriolis-eda-2.5.5-193.1.f4c1b74de.src.rpm
rpm_packager: Mazher Iqbal <mazher@lip6.fr>
location_href: x86_64/coriolis-eda-2.5.5-193.1.f4c1b74de.x86_64.rpm
checksum_type: sha256
description:
  A FOSS EDA tool suite for physical design. Provides an integrated
  place & route for ASICs. Support symbolic layout (Alliance) and
  real layout (GDS). While mainly written in C++, it has an extensive
  Python interface.


pkgId: f17a43d6c088b354c90e54c3bc1d49e6d32eee0653adf294539bf3ec63bad2d9
name: coriolis-eda-doc
arch: noarch
version: 2.5.5
epoch: 0
release: 193.1.f4c1b74de
summary: Documentation of the Coriolis EDA toolchain
url: https://coriolis.lip6.fr/
rpm_license: BSD-1-Clause AND LGPL-2.0-only AND GPL-2.0-only AND Apache-1.0
rpm_vendor: obs://build.opensuse.org/home:jpc-lip6
rpm_group: Applications/Engineering
rpm_buildhost: reproducible
rpm_sourcerpm: coriolis-eda-2.5.5-193.1.f4c1b74de.src.rpm
rpm_packager: Mazher Iqbal <mazher@lip6.fr>
location_href: noarch/coriolis-eda-doc-2.5.5-193.1.f4c1b74de.noarch.rpm
checksum_type: sha256
description:
  The documentation is a subset of the Coriolis website. It provides
  informations on:
  * The Hurricane database (C++).
  * The Coriolis Core (CRL) infrastructure (C++).
  * The dedicated C++/Python wrapper (Isobar,C/C++/Python). The Python
    interface has been made so that it mimics closely the C++ one, so
    the C++ doc can be used for both.
  * Some technical specifications.
  * A general introduction and user's manual.


pkgId: 2af89ca19ec06cb0c3a455dd940f3ca0af62095c05627adafa4f0ce96667e6d7
name: libngspice-devel
arch: x86_64
version: 44.2
epoch: 0
release: 1.10
summary: Development files for ngspice
url: https://ngspice.sourceforge.io
rpm_license: BSD-2-Clause
rpm_vendor: obs://build.opensuse.org/home:jpc-lip6
rpm_group: Development/Libraries/Other
rpm_buildhost: reproducible
rpm_sourcerpm: ngspice-44.2-1.10.src.rpm
location_href: x86_64/libngspice-devel-44.2-1.10.x86_64.rpm
checksum_type: sha256
description:
  Ngspice is a mixed-level/mixed-signal circuit simulator. Its code
  is based on three open source software packages: Spice3f5, Cider1b1
  and Xspice. This package contains the development files.


pkgId: b96a82a8b0e752c79325bb48a5af2047c6a935c2abd0eaa6b2e32e777cdcc689
name: libngspice0
arch: x86_64
version: 44.2
epoch: 0
release: 1.10
summary: Shared libraries for ngspice
url: https://ngspice.sourceforge.io
rpm_license: BSD-2-Clause
rpm_vendor: obs://build.opensuse.org/home:jpc-lip6
rpm_group: System/Libraries
rpm_buildhost: reproducible
rpm_sourcerpm: ngspice-44.2-1.10.src.rpm
location_href: x86_64/libngspice0-44.2-1.10.x86_64.rpm
checksum_type: sha256
description:
  Ngspice is a mixed-level/mixed-signal circuit simulator. Its code
  is based on three open source software packages: Spice3f5, Cider1b1
  and Xspice. This package contains the shared libraries.


pkgId: 42475dadad0e8bf6be3c31bc23a09e7d6832e1a42c79a7db0e816986008e4c6b
name: magic
arch: x86_64
version: 8.3.590
epoch: 0
release: 10.1
summary: A very capable VLSI layout tool
url: http://opencircuitdesign.com/magic/index.html
rpm_license: MIT
rpm_vendor: obs://build.opensuse.org/home:jpc-lip6
rpm_group: Unspecified
rpm_buildhost: reproducible
rpm_sourcerpm: magic-8.3.590-10.1.src.rpm
location_href: x86_64/magic-8.3.590-10.1.x86_64.rpm
checksum_type: sha256
description:
  Magic is a venerable VLSI layout tool. Magic VLSI remains
  popular with universities and small companies.

  Magic is widely cited as being the easiest tool to use for
  circuit layout, even for people who ultimately rely on commercial
  tools for their product design flow.


pkgId: b747a360ad62d124d032b6659b293074345d7b31339edc22eb56b76e999f4d22
name: ngspice
arch: x86_64
version: 44.2
epoch: 0
release: 1.10
summary: Mixed-level, Mixed-signal Circuit Simulator Based on spice3f5
url: https://ngspice.sourceforge.io
rpm_license: BSD-2-Clause
rpm_vendor: obs://build.opensuse.org/home:jpc-lip6
rpm_group: Productivity/Scientific/Electronics
rpm_buildhost: reproducible
rpm_sourcerpm: ngspice-44.2-1.10.src.rpm
location_href: x86_64/ngspice-44.2-1.10.x86_64.rpm
checksum_type: sha256
description:
  Ngspice is a mixed-level/mixed-signal circuit simulator. Its code
  is based on three open source software packages: Spice3f5, Cider1b1
  and Xspice.


pkgId: ce226fabf2cb72f836a5e19d78436246be2e8c823e2fa2cd3826d264e4c3bddd
name: ngspice-scripts
arch: x86_64
version: 44.2
epoch: 0
release: 1.10
summary: Ngspice init scripts
url: https://ngspice.sourceforge.io
rpm_license: BSD-2-Clause
rpm_vendor: obs://build.opensuse.org/home:jpc-lip6
rpm_group: Productivity/Scientific/Electronics
rpm_buildhost: reproducible
rpm_sourcerpm: ngspice-44.2-1.10.src.rpm
location_href: x86_64/ngspice-scripts-44.2-1.10.x86_64.rpm
checksum_type: sha256
description:
  Ngspice is a mixed-level/mixed-signal circuit simulator. Its code
  is based on three open source software packages: Spice3f5, Cider1b1
  and Xspice. This package contains the ngspice init scripts shared
  between ngspice and libngspice.


pkgId: c19ea614683c6422e11c45e60ff585f5ec245c35c4927e7eff04ae02db011686
name: ngspice-xspice-cm
arch: x86_64
version: 44.2
epoch: 0
release: 1.10
summary: Xspice code model Plugins
url: https://ngspice.sourceforge.io
rpm_license: BSD-2-Clause
rpm_vendor: obs://build.opensuse.org/home:jpc-lip6
rpm_group: Productivity/Scientific/Electronics
rpm_buildhost: reproducible
rpm_sourcerpm: ngspice-44.2-1.10.src.rpm
location_href: x86_64/ngspice-xspice-cm-44.2-1.10.x86_64.rpm
checksum_type: sha256
description:
  Ngspice is a mixed-level/mixed-signal circuit simulator. Its code
  is based on three open source software packages: Spice3f5, Cider1b1
  and Xspice. This package contains the Xspice code model plugins.


pkgId: 11c0955b0d898564ba59f141c90d90b70ed285eb5497f8081d116a54eb322cb8
name: openvaf
arch: x86_64
version: 23.5.0
epoch: 0
release: 5.1
summary: OpenVAF is a Next-Generation Verilog-A compiler
url: https://openvaf.semimod.de/
rpm_license: GPL-3.0-only
rpm_vendor: obs://build.opensuse.org/home:jpc-lip6
rpm_group: Applications/Engineering
rpm_buildhost: reproducible
rpm_sourcerpm: openvaf-23.5.0-5.1.src.rpm
location_href: x86_64/openvaf-23.5.0-5.1.x86_64.rpm
checksum_type: sha256
description:
  Circuit simulators play a critical role in the design of electrical circuits.
  Accurate simulations enable circuit designers to validate circuit behavior
  before actual fabrication happens, potentially saving significant re-design
  costs.  The simulation of a circuit critically depends on the so-called compact
  models and therefore:
  * The accuracy of the compact-model equations
  * The quality of the model parameters


pkgId: 2fa2a6acc619b91eccd254308f9809a9983d269a5b4fbc15f5681c55de597d3e
name: python3-coriolis-pdk-gf180mcu
arch: noarch
version: 2025.07.21
epoch: 0
release: 5.1.bfa7190
summary: Global Foundries 180 MCU open PDK
url: https://github.com/google/gf180mcu-pdk.git
rpm_license: Apache-2.0
rpm_vendor: obs://build.opensuse.org/home:jpc-lip6
rpm_group: Productivity/Scientific/Electronics
rpm_buildhost: reproducible
rpm_sourcerpm: coriolis-pdk-gf180mcu-2025.07.21-5.1.bfa7190.src.rpm
location_href: noarch/python3-coriolis-pdk-gf180mcu-2025.07.21-5.1.bfa7190.noarch.rpm
checksum_type: sha256
description:
  The GF180MCU  open source PDK  is a collaboration between  Google and
  GlobalFoundries to  provide a  fully open  source process  design kit
  (PDK)  and  related  resources  to enable  the  creation  of  designs
  manufacturable at GlobalFoundries's facility  on their 0.18um 3.3V/6V
  MCU process technology.

  The GF180MCU documentation can be found at <https://gf180mcu-pdk.rtfd.io>.


pkgId: 51bf948dd9d4ea3233d4b16abc5b8425ffb3721e39d0570cf72e4c6855962f8c
name: python3-coriolis-pdk-ihpsg13g2
arch: x86_64
version: 2025.07.21
epoch: 0
release: 11.1.bfa7190
summary: IHP Open PDK SG13G2
url: https://github.com/IHP-GmbH/IHP-Open-PDK
rpm_license: Apache-2.0
rpm_vendor: obs://build.opensuse.org/home:jpc-lip6
rpm_group: Productivity/Scientific/Electronics
rpm_buildhost: reproducible
rpm_sourcerpm: coriolis-pdk-ihpsg13g2-2025.07.21-11.1.bfa7190.src.rpm
location_href: x86_64/python3-coriolis-pdk-ihpsg13g2-2025.07.21-11.1.bfa7190.x86_64.rpm
checksum_type: sha256
description:
  130nm  BiCMOS Open  Source PDK,  dedicated for  Analog/Digital, Mixed
  Signal and RF Design

  IHP Open  Source PDK project  goal is to  provide a fully  open source
  Process  Design Kit  and related  data, which  can be  used to  create
  manufacturable  designs at  IHP’s facility.   As of  March 2023,  this
  repository is targeting the SG13G2 process node


pkgId: af921ecc495bf1b31ed687a37fc5455f910070039135a601e829601bd3317c7e
name: sv2v
arch: x86_64
version: 0.0.12
epoch: 0
release: 1.1
summary: sv2v - SystemVerilog to Verilog
url: https://github.com/zachjs/sv2v/
rpm_license: BSD-3-Clause
rpm_vendor: obs://build.opensuse.org/home:jpc-lip6
rpm_group: Applications/Engineering
rpm_buildhost: reproducible
rpm_sourcerpm: sv2v-0.0.12-1.1.src.rpm
location_href: x86_64/sv2v-0.0.12-1.1.x86_64.rpm
checksum_type: sha256
description:
  sv2v converts SystemVerilog (IEEE 1800-2017) to Verilog (IEEE 1364-2005),
  with an emphasis on supporting synthesizable language constructs.
    The primary goal of this project is to create a completely free and
  open-source tool for converting SystemVerilog to Verilog. While methods
  for performing this conversion already exist, they generally either rely
  on commercial tools, or are limited in scope.
    This project was originally developed to target Yosys, and so allows for
  disabling the conversion of (passing through) those SystemVerilog features
  that Yosys supports.


pkgId: 6b9be84504fcca53ed5c81be675e2a6c6d47b89bfe18d1c501a1b9a3a589ed6b
name: tas-yagle
arch: x86_64
version: 3.4.6
epoch: 0
release: 10.1.ea2ced1
summary: Tas/Yagle - Static Timing Analyser
url: https://coriolis.lip6.fr/
rpm_license: GPL-2.0-only
rpm_vendor: obs://build.opensuse.org/home:jpc-lip6
rpm_group: Applications/Engineering
rpm_buildhost: reproducible
rpm_sourcerpm: tas-yagle-3.4.6-10.1.ea2ced1.src.rpm
location_href: x86_64/tas-yagle-3.4.6-10.1.ea2ced1.x86_64.rpm
checksum_type: sha256
description:
  STATIC TIMING ANALYSIS
    The  advent   of  semiconductor  fabrication  technologies   now  allows  high
  performance in complex integrated circuits.
    With the increasing complexity of these circuits, static timing analysis (STA)
  has  revealed  itself  as  the  only  feasible  method  ensuring  that  expected
  performances are actually obtained.
    In addition, signal integrity (SI) issues due to crosstalk play a crucial role
  in performance and reliability of these  systems, and must be taken into account
  during the timing analysis.
    However, performance  achievement not  only lies in  fabrication technologies,
  but also  in the way circuits  are designed.  Very high  performance designs are
  obtained with semi or full-custom designs techniques.
    The HITAS platform provides advanced STA and SI solutions at transistor level.
  It has been  built-up in order to allow engineers to  ensure complete timing and
  SI coverage on their digital custom  designs, as well as IP-reuse through timing
  abstraction.
    Furthermore,  hierarchy  handling  through  transparent  timing  views  allows
  full-chip verification, with virtually no limit of capacity in design size.


pkgId: c683d8b855424e37be3644f653824cfa93b5306d9e715d800a2786a0579bf269
name: temurin-8-jdk
arch: x86_64
version: 8.0.472.0.0.8
epoch: 0
release: 10.1
summary: Eclipse Temurin 8 JDK
url: https://projects.eclipse.org/projects/adoptium
rpm_license: GPLv2 with exceptions
rpm_vendor: Eclipse Adoptium
rpm_group: java
rpm_buildhost: reproducible
rpm_sourcerpm: temurin-8-jdk-8.0.472.0.0.8-10.1.src.rpm
rpm_packager: Eclipse Adoptium Package Maintainers <temurin-dev@eclipse.org>
location_href: x86_64/temurin-8-jdk-8.0.472.0.0.8-10.1.x86_64.rpm
checksum_type: sha256
description:
  Eclipse Temurin JDK is an OpenJDK-based development environment to create
  applications and components using the programming language Java.


pkgId: e94759730dd36395046bb3e5e27dc0a65c37bf3b05b4c66824543a136b773014
name: yosys
arch: x86_64
version: 0.46
epoch: 0
release: 21.12.e97731b9d
summary: Yosys open synthesis suite
url: https://yosyshq.net/yosys/
rpm_license: ISC
rpm_vendor: obs://build.opensuse.org/home:jpc-lip6
rpm_group: Applications/Engineering
rpm_buildhost: reproducible
rpm_sourcerpm: yosys-0.46-21.12.e97731b9d.src.rpm
location_href: x86_64/yosys-0.46-21.12.e97731b9d.x86_64.rpm
checksum_type: sha256
description:
  This is a framework for RTL synthesis tools. It currently has
  extensive Verilog-2005 support and provides a basic set of
  synthesis algorithms for various application domains.

  Yosys can be adapted to perform any synthesis job by combining
  the existing passes (algorithms) using synthesis scripts and
  adding additional passes as needed by extending the yosys C++
  code base.

  Yosys is free software licensed under the ISC license (a GPL
  compatible license that is similar in terms to the MIT license
  or the 2-clause BSD license).


pkgId: 82f12c86ebf7a057ea9d89a01199d3f569e76c811d454cf9163b95323ab506a4
name: yosys-slang
arch: x86_64
version: 2025.10.31.ba1859e
epoch: 0
release: 19.1
summary: SystemVerilog frontend for Yosys
url: https://github.com/povik/yosys-slang.git
rpm_license: ISC
rpm_vendor: obs://build.opensuse.org/home:jpc-lip6
rpm_group: Applications/Engineering
rpm_buildhost: reproducible
rpm_sourcerpm: yosys-slang-2025.10.31.ba1859e-19.1.src.rpm
location_href: x86_64/yosys-slang-2025.10.31.ba1859e-19.1.x86_64.rpm
checksum_type: sha256
description:
  yosys-slang is  a Yosys plugin  providing a new  command (read_slang)
  for loading SystemVerilog designs.
    yosys-slang  builds   on  top  of  the  slang  library  to  provide
  comprehensive   SystemVerilog  support.   The   plugin  supports   an
  (informally defined) synthesizable subset of SystemVerilog in version
  IEEE 1800-2017 or IEEE 1800-2023.


# files

type: file
name:
  /usr/lib64/python3.13/site-packages/pdks/sky130_c4m/libs.tech/klayout/bin/__pycache__/conv_c4msky130_to_sky130.cpython-313.pyc


type: file
name:
  /usr/lib64/python3.13/site-packages/pdks/sky130_c4m/libs.tech/klayout/bin/conv_c4msky130_to_sky130.py


